Welcome to Secure-IC
Secure-IC Missions
Secure-IC provides a wide range of solutions to enhance and test the robustness of cryptoprocessors integrated in high-end embedded systems.
The Secure-IC team is a major actor in the protection of electronic circuits against side-channel or fault injection attacks.
The proposed competences are the fruit of scientific and industrial researches in trusted computing led
in the security laboratory of TELECOM ParisTech whose Secure-IC is a spin-off.
Secure-IC Products
- High performance cryptographic IPs robust against side-channel attacks (SCA) and faults injection (FI) for FPGAs or ASICs.
- Generic CAD tools for SCA resistant circuits.
- Evaluation of electronic circuit's robustness against SCA and FI.
- Development of custom applications or circuits to secure embedded systems.
- Embedded systems securization Consulting.
Job Offers
Secure-IC is hiring two research developers:
- Software developer on trusted computing platform.
- Hardware developer on trusted computing platform.
Contact
Latest News
- The team of Secure-IC will be present at
FDTC'09 (Lausanne, Switzerland):
Presentation
entitled "WDDL is Protected Against Fault Attacks".
- The team of Secure-IC will be present at
HOST'09 (San Francisco, CA, USA):
Presentation
entitled "Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs".
- The team of Secure-IC will be present at
CryptArchi'09 (Prague, Czech republic):
Twain presentations
entitled "Evaluation of Countermeasures Implementation Based on Boolean Masking to Thwart Side Channel Attacks"
and
"Mid-term review of the 'DPA contest'".
- The team of Secure-IC was present at
CryptoPuces'09 (Porquerolles, France):
Twain presentations
in French
entitled "Évaluation sur FPGA de contre-mesures aux attaques par canaux auxiliaires" and
"Théorie de la corrélation multi-bit et rapport à mi-parcours du 'DPA contest'".
- The team of Secure-IC was present at
DATE'09 in track A4 (Nice, France):
Presentation
entitled "Successful Attack on an FPGA-based Automatically Placed and Routed WDDL+ Crypto Processor".
- The team of Secure-IC presents an IC cartography technique under the title "ElectroMagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack of a Cryptographic Module" in the ACM journal TRETS volume 2 issue 1, March 2009.
- The team of Secure-IC releases under
GPL
the first version of the security FPGA evaluation environment
EveSoC
for the
SASEBO platforms.
- The team of Secure-IC was present at
IWSS'09
– IEEE Computer Society (Fukuoka, Kyushu, Japan):
Presentation
entitled "Deconvolving Protected Signals".
- Watch the Secure-IC design & evaluation lab in action
(streaming video, login = guest, password = guest).
- The team of Secure-IC was present at
PASTIS'08 (Gardanne, France):
Presentation
entitled "FPGAs for Counter-Measures Evaluation".
- The team of Secure-IC presents excellent in-silico evaluation results of the SecLib logic
in an article of the IEEE Transactions on Computers entitled "Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks";
This information is relayed via a press release emitted by the TELECOM Institute.
- The team of Secure-IC was present at
DCIS'08 (Grenoble, France):
Twain presentations
entitled "Security Evaluation of a Balanced Quasi-Delay Insensitive Library" and
"A Secure Programmable Architecture with a Dedicated Tech-mapping Algorithm: Application to a Crypto-Processor".
- The team of Secure-IC was present at
NTMS'08 (Tangier, Morocco):
Presentation
entitled "Fault Attack on AES FPGA Encryption Platform".
- The team of Secure-IC was present at
FPL'08 (Heidelberg, Germany):
Presentation
entitled "Area Optimization of Cryptographic Co-Processors Implemented in Dual-Rail with Precharge Positive Logic".
- The team of Secure-IC was present at
CHES'08 (Washington, DC, USA):
Poster
entitled "DPA Contest" and
eponymous
rump-session (One-year international contest, whose rules are available on:
www.dpacontest.org).
- The team of Secure-IC was present at
FDTC'08 (Washington, DC, USA):
Presentation
entitled "Silicon-Level Solutions to counteract Passive and Active Attacks".
- The team of Secure-IC was present at
SSIRI'08 (Yokohama, Japan):
Presentation
entitled "Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs".
- The team of Secure-IC was present at
Future of Trust in Computing 2008 (Berlin, Germany):
Presentation
entitled "Shall we trust WDDL?".
- The team of Secure-IC was present at
HOST'08, collocated with DAC'08 (Anaheim, CA, USA):
Presentation
entitled "Place-and-Route Impact on the Security of DPL Designs in FPGAs".
- The team of Secure-IC was present at
CryptArchi'08 (Trégastel, France):
Presentation
entitled "Implementation and Evaluation of WDDL Countermeasures in FPGAs".
- The team of Secure-IC was present at
EDCC'08 (Kaunas, Lithuania):
Presentation
entitled "Practical Setup Time Violation Attacks on AES".
- The team of Secure-IC was present at
ARC'08 (London, UK):
Presentation
entitled "Physical Design of FPGA Interconnect to Prevent Information Leakage".