RISC-V SUMMIT 22
December 06, 2022
Go back to events
Go back to events
RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration. RISC-V enables the community to share technical investment, contribute to the strategic future, create more rapidly, enjoy unprecedented design freedom, and substantially reduce the cost of innovation.
Join Secure-IC team at RISC-V-SUMMIT and discuss your needs regarding embedded cybersecurity solutions.
Book a meeting with our team during the event
Practical details:
- 📍 San Jose, CA
- 📅 December 13 , 2022