Advanced Cybersecurity Innovation Activities

• Cloud Security
• CPU Security (especially around the RISC-V ecosystem)
• Hardware Trojan
• Artificial Intelligence (AI)
• Machine Learning
• Post-Quantum Cryptography
• Etc.

RISQ

Secure-IC is the leader of the RISQ project focusing on Post-Quantum Cryptography and aiming at making France a major international player in the post-quantum transition.

RISQ wishes to reinforce the presence of the French digital security industry within standardization organizations by bringing together national players (major industrial groups, SMEs, government agencies, academic laboratories) – whose skills are internationally recognized – in order to coordinate their actions in proposing standards and evaluating applications.

The project defines a roadmap for the launch of “post-quantum” security products – software and hardware cryptographic computation libraries, archiving and time-stamping servers – ranging from the design of theoretical building blocks by the partner laboratories to the development of demonstrators and their validation.

For Secure-IC, the objectives are mainly to develop hardware acceleration solutions for post-quantum cryptography systems and to evaluate the resistance of post-quantum implementations to physical and micro-architectural attacks.

• Partners: Laboratoire d’Informatique de Paris 6, Thales SIX-GT, CEA List, (ENS de Lyon / INRIA Rhône-Alpes), Université de Versailles Saint-Quentin, CryptoExperts, CS-Novidy’s, IRISA / Université Rennes-1, Secure-IC, Ecole Normale Supérieure (ENS Paris), (Gemalto / Thales-DIS), Airbus, Agence Nationale de la Sécurité des Systèmes d’Information (ANSSI), Orange, Paris Centrer for Quantum Computing (PCQC/CNRS)
• Funding Institutions: Programme d’Investissement d’Avenir – FSN – BPIfrance

More information on the project website

SLASH+: Solution(s) for Indoor Tracking Adapted to Hospital Services

In a hospital context or to maintain people at home, the need for “Indoor” geolocalization services is very strong nowadays.

The Slash+ project aims to answer this need by providing an “Indoor” location-based system with high accuracy, low energy consumption, much less disturbing than Wi-Fi systems, and less expensive than current ones. Indoor tracking is a good example of the deployment of portable and ubiquitous embedded electronics, but its networked operation requires careful consideration, right from the design stage, of the protections to be implemented against malicious intentions.

For Secure-IC, the objectives are mainly to define, implement and verify the security components by testing them in the various elements making up the overall system.

• Partners: Eolane, CEV Group, Blinksight, Secure-IC, Timecod, West Electronic Applications Network, Mutualité Française Anjou Mayenne CENTRITECH, Université de Nantes IETR
• Funding Institutions: FUI-19 / Région Bretagne, Pays de Loire, Normandie / Rennes Métropole / BPIfrance

APRIORI (Advanced PRivacy of IOT Devices through Robust Hardware Implementations)

As a technology, IoT will become even more pervasive over the next years and address all verticals of our economy and our everyday lives. The need for privacy that is one of the main sensitive issue raised by IoT, cannot only be addressed on network and software level, as the data is rooted in the device. Recording, processing and reaction on data, also localized AI, require physical protection.

In this context, APRIORI (Advanced PRivacy of IOT Devices through Robust Hardware Implementations), a French/German project aims to support privacy by design to ensure the security and privacy of IoT devices in the future. It will consider a generic IoT architecture for privacy that relies on three important blocks: the root of trust, the protocol to use it for cryptographic purposes, and a secure element.

Secure-IC will provide specification of digital sensors and be deeply involved in electromagnetic injection attack sensor evaluation, typically to characterize the nature of the injection and thus to inform the software layers about the stress the IoT is subject to.

• Partners: Fraunhofer-Institut für Angewandte und Integrierte Sicherheit, Institut Mines Télécom, Mixed Mode GmbH, Siemens, Technical University of Munich, Secure-IC
• Funding Institutions: ANR, Bundesministrerium für Bildung und Forschung

ARCHI-SEC: Security Analysis at Micro-Architectural level

Attacks exploiting micro-architectural vulnerabilities, such as Meltdown, Spectre, Rowhammer, etc., are on the rise. Modern day System on Chip (SoC) embeds increasingly complex design features, and the security aspect of these new architectures and technologies remains under-studied.

ARCHI-SEC project aims at modeling the architectural problems with a virtual platform. It will be used for penetration testing, evaluation of the performance cost of countermeasures, anticipation of new attacks and protections proposition.

Thus, ARCHI-SEC will enable a virtualization of attacks, thereby making the study easier and more general. In addition, it will be possible to study and optimize attack methods, and therefore to rate quantitatively the relative power of attacks. These results will be a major step forward to understand the definitive power of micro-architectural attacks, and therefore will allow stakeholders to make sound decisions how to mitigate or tolerate them.

• Partners: Télecom Paris, IRISA, LIRMM, Laboratoire Huber Curien, Secure-IC
• Funding Institution: ANR

More information on the project website

MOOSIC – Multi-Objective Optimized Synthesis to Improve Cybersecurity

MOOSIC project offers to develop a framework dedicated to security that can be integrated into the conventional IC design flow. The goal is to take into account, as early in the design phase, both countermeasures against Hardware Trojans and performance, to ensure that the SoC behavior is guaranteed despite untrusted IPs vendors or foundry. Towards this objective, the project envisions to establish and evaluate security properties and then integrate them during synthesis with multi-objective optimization techniques, which will be built on a mathematical modeling of the problem that takes into account both the performance and the Hardware Trojans’ effects. It is indeed necessary to find a good compromise between the level of security sought after and performance.

MOOSIC aims at establishing security properties against HTs and evaluate the different parts of the SoC regarding these properties, identifying, thanks to these evaluations, the most critical parts of the SoC and adding automatically hardware counter-measures both satisfactory from security and performance points of view.

Secure-IC is responsible to validate the overall methodology with industrial use-cases.

• Partners: LIP6 Laboratoire d’informatique de Paris 6, CEA LIST Laboratoire d’Intégration des Systèmes et des Technologies, UM-LIRMM Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier, Secure-IC
• Funding Institution: ANR

More information on the ANR website

BRAINE – Big data pRocessing and Artificial Intelligence at the Network Edge

The EU-funded BRAINE project aims at boosting the development of the Edge framework focusing on energy efficient hardware and AI empowered software, capable of processing Big Data at the edge, supporting security, data privacy, and sovereignty. The approach is to build a seamless Edge MicroDataCenter interlinked with AI enabled network interface cards.

Through its work, the project will advance Europe’s position in intelligent edge computing and promote growth in sectors such as smart manufacturing, the Internet of Things, smart cities and smart healthcare.

Secure-IC contributes to post-quantum cryptography and security against attacks on micro-architectures.

• Partners: Consorzio Nazionale Interuniversitario per le Telecomunicazioni – Cnit, IS-Wireless, Comcores Aps, Hiro-Microdatacenters BV, Mellanox Technologies, Emc Information Systems International – Dell, Pcb Design Kutató és Fejleszto Kft, NEC Laboratories Europe, Gottfried Wilhelm Leibniz Universitaet Hannover, Sixsq, Eccenca, Wind Tre, Industrial Management Consulting Slovakia, Scuola Superiore di Studi Universitari e di Perfezionamento, Italtel, Vmware Bulgaria Eood, JJ Cooling Innovation, Budapesti Muszaki Es Gazdasagtudomanyi Egyetem, Technische Universiteit Eindhoven , Infineon Technologies, Helder Innovation + Development (Hid), Kradient Intelligence Oy, University College Cork, Ceske Vysoke Uceni Technicke v Praze, Factorio Solutions, Synano, Smarty, Secure-IC
• Funding Institutions: Europe (Horizon2020), ECSEL JU (now KDT JU)

More information on the project website

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